Incremental_Signoff_Metal_Fill_Takeyoshi_Ikedax
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Transcript Incremental_Signoff_Metal_Fill_Takeyoshi_Ikedax
Incremental Signoff Metal Fill Flow using
Encounter®, PVS & QRC Extraction
Takeyoshi, IKEDA (AE Director @Cadence Japan)
SSV Signoff Summit
21st, Nov 2013
Cadence Tools in the Flow
Physical Implementation (Encounter Implementation System (EDIS))
Post route timing optimization with virtual metal fill based RC extraction
Invoking Incremental RC extraction & metal fill
Trim metal fill after ECO routing
Trim metal fill around timing critical nets
RC Extraction (QRC Extraction)
Virtual Metal Fill(VMF) based TQRC/IQRC
Incremental TQRC/IQRC Extraction
Metal Fill (PVS)
Incremental Metal Fill
2
© 2013 Cadence Design Systems, Inc. All rights reserved.
Agenda
1. Metal Fill Technical Issue
2. Timing Aware Metal Fill Flow
3. Summary
4. Japanese Customer Story
3
© 2013 Cadence Design Systems, Inc. All rights reserved.
1. Metal Fill Technical Issue
4
© 2013 Cadence Design Systems, Inc. All rights reserved.
1-1. What’s Metal Fill
CCP* thickness map
DFM -> CMP -> Verify CMP
Without Metal Fill
M2
M1
Large thickness variation
With Metal Fill
M2
M1
Metal Fill
5
RC impact ->
worse timing
Small Thickness variation
*CCP--- Cadence® Chemical Mechanical
Polishing Predictor
© 2013 Cadence Design Systems, Inc. All rights reserved.
1-2. 40nm Fill vs. 28nm Fill
40nm
28nm
Regular Fill
Regular Fill
OPC* Fill
wire
MF Insertion TAT
X 5.6
X 5.9
Memory
X 5.7
28nm
20M Instance
7.5hrs@16cpu
Memory 50G
6
*OPC: Optical Proximity Correction
© 2013 Cadence Design Systems, Inc. All rights reserved.
1-3. Metal Fill impact to Timing
QRC: RC extraction
SPEF (Capacitance) comparison
sign-off MF vs. without MF
Tempus: Timing analysis
Sign-off MF
X 1.6
0.175 pF
Capacitance
increase by
Metal Fill
Increase
Violation
0.110 pF
Without MF
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© 2013 Cadence Design Systems, Inc. All rights reserved.
1-4. Existing Flow
P&R
In 28nm and below, RC
correlation is not good
between initial P&R phase
and sign-off phase due to
complicated metal fill rule.
without MF
RC extraction
Delay Calc
Non-Physical Aware Timing
ECO causes more # of iteration.
no
ECO
28nm
20M Inst
@16cpu
8
Timing
yes
correlation
Chip performance becomes
worse with large design margin
Sign-off
7.5hrs
Sign-off MF
generation
30hrs
RC extraction
Delay Calc
© 2013 Cadence Design Systems, Inc. All rights reserved.
Metal fill generation and
RC extraction time increase
with large scale and
complicated design.
10~15
iterations
Increase # of design
iteration causes an increase
of total TAT time
2. Timing Aware Metal Fill Flow
9
© 2013 Cadence Design Systems, Inc. All rights reserved.
2-1. Production Proven by Renesas
RC extraction with
virtual metal fill
EDIS
Design optimize
QRC:VMF
the command to
generate Sign-off Metal
Fill by PVS.
EDIS
PVS: Sign-off MF
timing
no
Physical Aware ECO
EDIS &Tempus
Tempus:
Timing ECO
PVS&QRC:
Incremental
yes
Sign-off
© 2013 Cadence Design Systems, Inc. All rights reserved.
EDIS
trim MFNN
timing
Sign-off MF
10
trimMFNearNet to
remove metal fill
around critical nets
trim MF
OK?
timing
Incremental
Metal Fill and RC
Extraction
yes
OK?
timing
no
2-2. QRC Extraction: Virtual Metal Fill
Virtual Metal Fill Capability
SPEF (Capacitance) Comparison
Timing Analysis
VMF vs. sign-off MF
VMF
Good correlation
between VMF and
sign-off MF
Fast run time
compared to
Sign-off MF
Sign-off MF
CUSTOMER DATA
Non-Confidential - Can be Disclosed publicly.
However,
copying
or distribution
may
11 modification,
© 2013 Cadence
Design
Systems, Inc.
All be
rights reserved.
11
restricted nd require prior written permission of owner.
2-3. EDIS: To generate Sign-off Fill by PVS
Sign-off Metal Fill generation
PVS -> Run Metal Fill
Sign-off MF rule
Metal Fill
Fill generated by PVS
is loaded into EDIS
automatically.
12
© 2013 Cadence Design Systems, Inc. All rights reserved.
2-4. PVS: Incremental Metal Fill
Incremental Metal Fill Capability
wire
Fill
Design change
55%
93%
Incremental MF
Without
Incr-MF
Trim MF
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large design
change
Small design
change
With Incremental
2-5. EDIS: To remove fill around critical nets
trimMetalFillNearNet capability
Run Time
wire
reference
High
performance
Timing
Pass
Critical Net
3min
Fill
Fail
minTrimDensity
Option to keep
minimum Density
20.00%
TrimMFNN
14
Pass
© 2013 Cadence Design Systems, Inc. All rights reserved.
2-6. QRC Extraction: Incremental RC Extraction
(IQRC)
Incremental Extraction
RC Extraction
Timing
86
%
ECO
Trim Metal Fill
+
Incremental Metal Fill
Incremental RC
Extraction
Timing
RC Extractor checks for design
changes, runs RC extraction on the
modified areas only.
15
© 2013 Cadence Design Systems, Inc. All rights reserved.
3. Summary
16
© 2013 Cadence Design Systems, Inc. All rights reserved.
3. Summary
1 iteration TAT comparison
70% TAT reduction is possible
with incremental MF insertion
and incremental RC extraction.
No Fill
EDIS
RC
extraction
RC extraction
Timing analysis
timing
MF generation
real Fill
EDIS
trimMF
70% TAT
reduction
VMF
EDIS
VMF
RC
extraction
timing
Incr-MF
Incr-Extract
EDIS
Sign-off MF
trim MFno
RC
extraction
Incremental MF
timing
Incremental
extraction
timing
17
© 2013 Cadence Design Systems, Inc. All rights reserved.
4. Japanese Customer Story
18
© 2013 Cadence Design Systems, Inc. All rights reserved.
CUSTOMER DATA
Non-Confidential - Can be Disclosed publicly.
However, modification, copying or distribution
may be restricted nd require prior written
permission of owner.
Renesas improved timing closure using EDI-PVS Metal Fill
Previous flow
Our flow
Place&
Route
Place&
Layout
Route tool
Fix timing violations
in EDI
Place &
GDS
Route
InSignOff
Design
Metal
Fill
Metal Fill
Metal Fill
Big Timing
Impact!
Deleted metal fill of upper and
lower layer of critical path.
SignOff
Check
Density violations
Reduced TNS of Setup and Hold
to 10%~75%.
Timing violations
Sign-off
check
Trim Metal Fill with
Density and Timing Aware
Metal Fill to only ECO area
SignOff
Check
layout
Fix timing violations
with Metal Fill in EDI
10 Iterations
1 iteration
Design term
1/3
ECO
Metal fill
19
Timing Analysis(Layout tool)
Time
© 2013 Renesas Electronics Corporation. All rights reserved.
Time
Thank You!
20
© 2013 Cadence Design Systems, Inc. All rights reserved.